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Papers & Articles about 3D ICs

(Listed in reverse chronological order)

Articles added since May 12 are highlighted like this

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MCA Public Relations to Host BrightSpots(SM) Forum on 3D IC Technology
PR Newswire, 8 June 2009

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Memory Applications, Packaging & Integration Trends
Yole Développement (for purchase), May 2009

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Downturn to Spur Shift to 3-D
Semiconductor International, 27 May 2009

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Infrastructure Still Inhibits 3-D ICs
Semiconductor International, 20 May 2009

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Can cost-sharing accelerate 3D IC commercialization?
Françoise in 3D, 18 May 2009

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Semi Standards – a 3D conundrum?
Françoise in 3D, 12 May 2009

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Nice DATE
Perspectives from the Leading Edge, 9 May 2009

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Memory Packaging & Integration Trends
Advanced Packaging, 8 May 2009

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3D from all angles at DATE 2009 3D workshop
Françoise in 3D, 4 May 2009

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3-D Infrastructure as seen by IMAPS and
Deep in the Heart of Texas
Perspectives from the Leading Edge, 12 and 4 April 2009

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3-D Equals Two Generations of Scaling
Semiconductor International, 2 April 2009

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IMAPS Panelists Address Tough 3-D Challenges
Semiconductor International, 19 March 2009

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Nanorods said to ease assembly of 3-D chip stacks
EE Times, 18 March 2009

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Coverage of IMAPS Device Packaging Symposium:
Françoise in 3D: March 9, March 10, March 11.

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3D Integration – A Solution for Next Generation Silicon Devices
ASTRI, published by weSRCH

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Signs of 3D Maturity
Advanced Packaging, 4 March 2009

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Special Report: 3-D Interconnects
Semiconductor International, 27 February 2009

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3D EDA Tools – Coming out of the Woodwork
Françoise in 3D, 26 February 20009

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3D IC Integration at the 2009 IEEE ISSCC
Perspectives from the Leading Edge, 20 February 2009

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Tackling the TSV Checklist
 -- and --
3-D Jargon - Getting it Straight
Advanced Packaging, 18 February 2009

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GBC 2009 - A 3D Packaging Junkie’s Dream
Françoise in 3D, 5 February 2009

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Advanced Packaging Technologies Still Going Strong
Advanced Packaging, February 2009

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TSV First and Last, Part 1 and Part 2
Advanced Packaging, 7 and 22 January 2009

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Françoise in 3D (new blog about 3D ICs)
21 January 2009

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Advanced Packaging: 3D IC, WLP & TSV
i-Micronews, 19 January 2009

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Ten 2009 trends: 3D ICs gain interest and tool support
SCD Source, 16 December 2008

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Moore’s Law -- the z-dimension: a decade later
Solid State Technology, December 2008

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Focus on: 3D Interconnects
Semiconductor International, 5 December 2008

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Through-silicon vias, oxide bonding accelerate 3D IC development
EDN, 1 December 2008

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3-D ICs: What will happen in 2009?
Yole/RTI, November 2008

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3-D Packaging News, November
I-Micronews, November 2008

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You Can't Always Get What You Want...
Perspectives from the Leading Edge, 24 November 2008

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3-D ICs Enter Commercialization
Semiconductor International, 1 November 2008

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3-D Packaging News, October
I-Micronews, October 2008

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IMEC Research Energetically Stacks Up
Advanced Packaging, 27 October 2008

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3-D, TSV Need Standards and Thermal Solutions to Advance
Semiconductor International, 19 October 2008

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IMEC Views 3-D Stacking as System Design
Semiconductor International, 14 October 2008

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3D IC Questions and Answers with the EMC-3D Consortium
Perspectives From the Leading Edge, 5 October 2008

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How Might 3-D ICs Come Together?
Semiconductor International, 1 October 2008

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Georgia Tech, Partners Launch 3-D Consortium
Semiconductor International, 30 September 2008

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3D Integration - Sources of Information - Update
Perspectives From the Leading Edge, 22 August 2008

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Research institute creates ultra-fast 3D circuit
EE Times, 28 July 2008

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Recent 3D IC Integration Activity
Perspectives From the Leading Edge, 27 July 2008

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3-D TSV Interconnects: Equipment & Materials Report
Yole Developpement (for purchase), 25 July 2008

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3 D in the Memory Chip Market (Chinese language)
Huicong, 18 July 2008

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SEMICON West: Path to TSV Adoption
Advanced Packaging, 15 July 2008

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IMEC, Qualcomm to research 3D integration
EDN, 14 July 2008

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Why 3-D TSV is Hotter Than Hot
Semiconductor International, 11 July 2008

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3-D Chip Stacks Standardized
EE Times, 10 July 2008

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Yole Predicts Millions of 3D-TSV Wafers
EE Times, 7 July 2008

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The Next Phase of Moore's Law
Forbes.com, 9 June 2008

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3D Integration Tour
Advanced Packaging, 22 May 2008

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3D for microprocessors now... TSV later
SolidState Technology, 21 May 2008

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Economics may drive push to 3D
SolidState Technology, 21 May 2008

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ADVANCED PACKAGING: 3D IC, WLP & TSV
I-Micronews, 19 May 2008

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Road Trip Revelations and 3D Road Tour Cont'd.
Perspectives From the Leading Edge, May 2008

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3-D ICs are Cost-Driven, Evolutionary
Semiconductor International, 31 March 2008

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TSV forecast for millions of wafers
Solid State Technology blog, 22 February 2008

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3D IC Integration: Rumors and Ruminations
Perspectives From the Leading Edge, 8 February 2008

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3D-ICs and Integrated Circuit Security (.pdf format)
Tezzaron white paper, February 7, 2008

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Roadmap Dictated by Flash, More Than Moore
Semiconductor International, January 25, 2008

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3D interconnect session brings new topic to IITC
EDN, January 25, 2008

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3D Packaging - Which Way to Go?
Advanced Packaging, January 21, 2008

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IC Packaging Gets Ready For The Big Squeeze
electronic design, January 17, 2008

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Interconnect Conference Expands Scope
Semiconductor International, January 2, 2008

For earlier listings click here

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