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Papers, Articles, & Blogs about 3D-ICs

(Listed in reverse chronological order)

2014

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The 2014 European 3D TSV Summit: Get Ready for the Domino Effect
3D InCites, 27 January 2014

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Will Monolithic 3D IC Technology become a real competitor to 3DIC with TSV
Insights from the Leading Edge, 21 January 2014

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3DIC market to reach $7.52B by 2019
Solid State Technology, 17 January 2014

2013

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From 3-D transistors to 2.5D or 3D systems
Chip Design Magazine, 31 December 2013

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3D TSV without Limits
3D InCites, 4 December 2013

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The World Before 3D ICs
EE Times, 26 November 2013

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3D-IC Standardization Progress Continues
SemiconductorEngineering, 14 November 2013

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Developing and strengthening 3D IC manufacture in Europe
EE Times Europe, 1 March 2013

2012

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News from 3-D Architectures for Semiconductor Integration and Packaging
Chip Scale Review, December 2012

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The new dimension in chip design
Electronics News, 26 October 2012

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Chips Go Upscale
Communications of the ACM, September 2012

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SEMI Standards, the ITRS Roadmap and other Boring but Important Items for the Progression of 3D IC manufacturing
3D InCites, 8 August 2012

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Design and Test Solutions are Trending in 3D ICs
3D InCites, 7 August 2012

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Max Maxfield’s 3D IC Trilogy
InfoNeedle, 31 July 2012

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First 3D-IC Standard Approved
SEMI press release, 26 July 2012

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3D TSV packages outgrow semiconductor industry by 10X
Solid State Technology, 19 July 2012

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EDPS: 3D ICs, part I and part II
SemiWiki, 10 and 12 July 2012

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Architectural Changes Will Drive Miraculous 3D Gains
Chip Design blog, 12 July 2012

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What Standards are Needed for 3D-ICs?
What Standards are Needed for 3D-ICs?
What Standards are Needed for 3D-ICs?

What Standards are Needed for 3D-ICs?
Cadence blog, 28 June 2012

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Electrical Design and Modeling Challenges for 3D Integration
DesignCon 2012, 25 June 2012

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Separate The Hype From The Reality In 3D-ICs
Electronic Design, 15 June 2012

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The “King of 3D ICs” (Herb Reiter) speaks to his subjects—“Learn to work together”
EDA360 Insider, 13 June 2012

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3D and 2.5D semiconductor packaging technologies @ The ConFab
Solid State Technology, 6 June 2012

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2.5D and 3D: Life Preservers for Foundries?
3D InCites, 31 May 2012

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Is Wide I/O a game changer?
EDN, 30 May 2012

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Xilinx: 3-D Chip a Route to More Complex Semiconductors
Barron's, 30 May 2012

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What will change on the road to 3D ICs?
EE Times blog, 29 May 2012

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GSA Working Group Tackles Barriers to 3D-IC Adoption
Cadence blog, 21

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The low down on low-power CPU-memory connections
EDA360 Insider, 18 April 2012

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New Dimension in Chips
Electronic Engineering Journal, 17 April 2012

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Let’s Rally Around 3D Chip Standards
Semiconductor Manufacturing & Design blog, 16 April 2012

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What Needs to Happen for 3D-IC TSV Success
Cadence blog, 11 April 2012

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Want a peek at a possible Qualcomm 3D IC roadmap?
EDA360 Insider, 10 April 2012

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Show Me The Money: 3D Friday at EDPS
3D Incites, 9 April 2012

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2D vs. 2.5D vs. 3D ICs 101
EE Times Design, 8 April 2012

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Report: 3D IC Market Ready to Boom
Printed Circuit Design & Fab, 4 April 2012

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Global 3D Technology, Products & Applications Market to be Worth US$227.27 Billion by 2016
3D Roundabout, 23 March 2012

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The future of computers: 3D chip stacking
ExtremeTech, 7 March 2012

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The Future of Packaging (see page 9)
Chip Scale Review, Jan/Feb 2012

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3D processor-memory mashups take center stage
The Register, 24 February 2012

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ISSCC: Pictures from a silicon exhibition
EE Times, 23 February 2012

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Interchip Connectivity: C2C, MIPI LLI and the path to 3D IC and TSV
Arteris blog, 23 February 2012

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3D IC Architecture: A Natural Evolution
GSA (for purchase)

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Wanted: 3D Chip Testing Solutions and Standards
Semiconductor Mfg. and Design, 8 February 2012

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Lessons Learned from 3D DRAM-on-Logic Chip Development
Semiconductor Packaging News, 2 February 2012

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3D Standards
SemiWiki, 1 February 2012

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Wanted: 3-D IC standards within six months
EE Times, 31 January 2012

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Going up...3D IC design tools
SemiWiki, 23 January 2012

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Mind the Gap! SEMATECH’s EMA’s Prepare 3D Tools
3D InCites, 23 January 2012

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JEDEC publishes wide-I/O mobile DRAM standard
ElectroIQ, 5 January 2012

     2011

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A Host Of 3D IC Collaborations And Standardization Efforts Emerging
and
Is 3D IC Packaging Ready For Prime Time?
Electronic Design, 28 December 2011

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Videos from 3D-ASIP (and other 3D events)
3D InCites, 20 December 2011

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Sematech identifies top tech challenges to 3-D ICs
EE Times, 20 December 2011

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Driven by economics, it’s now one minute to 3D
and
Why is 3D important? Now? The memory wall, heat, and disposable sensors
EDA360 Insider, 12 December and 14 December 2011

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Si2 Announces Founding Members of the Open3D Technical Advisory Board
and
IEDM Panel Gives 3D the Green Light
3D InCites, 9 December and 12 December 2011

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Challenges in 3D-IC and 2˝D Design
SemiWiki, 9 December 2011

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2.5D announcements at the Global Interposer Tech conference
ElectroIQ, 6 December 2011

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Experts At The Table: Improving Yield: Part 1, Part 2, Part 3
Semiconductor Manufacturing and Design, 27 Oct, 7 Nov, 21 Nov 2011

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A Little Disruption can be Good for You!
3D InCites, 17 November 2011

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Building 3D-ICs: Tool Flow and Design Software: Part 1, Part 2
EE Times, 14 Nov & 

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DesignCon 2012: 3D IC standards, great! But do we care?
EDN, 15 November 2011

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Steve’s Improbable History of 3D ICs
EDa360 Insider, 9 November 2011

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3D-IC: Ushering in a New Era in the Semiconductor Industry
SEMI, 8 November 2011

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SEMATECH forum promotes 3D interconnect standards development
I-Micronews, 7 November 2011

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Micron / Samsung TSV stacked memory collaboration
I-Micronews, 1 November 2011

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2011 IEEE 3D test workshop
Insights From the Leading Edge, 23 October 2011

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Perfecting the 3-D chip
EE Times, 11 October 2011

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IWLPC in 3D
3D InCites, 7 October 2011

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Samsung, Micron Say Memory Needs to Go Vertical to Keep Up
Bloomberg, 6 October 2011

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Price cited as top challenge in 3-D stacks
EE Times, 5 October 2011

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A primer on 3D-IC design challenges
EE Times-Asia, September 2011

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How to test 3D chips
ElectronicsWeekly, 21 September 2011

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3D-IC Design: The Challenges of 2.5D versus 3D
EE Times Design, 14 September 2011

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Limits For TSVs In 3D Stacks?
Chipdesign, 8 September 2011

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Upcoming Xilinx FPGA shows 3-D IC progress
EE Times, 8 September 2011

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Samsung’s 32GB RDIMM DDR3, GLOBALFOUNDRIES Packaging Alliance, Ziptronix Licensing News
Insights From the Leading Edge, 3 September 2011

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3D Packaging issue #20 available for download
Registration required (free)
Yole, 1 September 2011

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Semicon 2011 TechXSpots on “beyond 40 nm” and “3D deep sub micron”
Insights From the Leading Edge, 27 August 2011

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3D-IC Opens a New Era of IC Packaging and Testing
SEMI, 2 August 2011

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3D Stacking: A Reality Check    and
Solving Memory Subsystem Bottlenecks In 3D Stacks
System Level Design, 28 July 2011

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3D’s Supporting Players
Electrical Engineering Journal, 25 July 2011

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3D IC with TSV show significant advances in last 12 months
ElectroIQ, 26 July 2011

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Elpida and MOSIS Ready for 3D IC ; TSV Going “Where the Sun Don’t Shine”
Insights From the Leading Edge, 9 July 2011

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3-D Packaging: Getting Closer to Prime Time
TTI, Inc, 6 July 2011

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Florida Sun Shines Light on Electronic Packaging Trends
Printed Circuit Design & Fab, 30 June 2011

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Moore’s Law to be overthrown by IC packaging developments?
Electronics News, 30 June 2011

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3d chip packaging set to enable increased integration
newelectronics, 29 June 2011

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EDA tools pave path to 3-D ICs
EDN, 9 June 2011

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3D: Progressing Past the Powerpoint (page 10)  also:
Taking the Fear and Paint out of 3D Migration (page 26)  also:
several other articles on 3D-ICs
Chip Scale Review, May/June 2011

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imec ITF: The next wave of applications, with chips designed in 3D
Solid State Technology, 25 May 2011

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Inspiring the Semi Industry's New Frontier
3D InCites, 10 May 2011

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SRC attacks 3DIC reliability, design tools with new effort
Advanced Packaging, 5 May 2011

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3D-IC Stacked Integrated Circuit Innovations Ready for Prime Time Manufacturing
MEMS Investor Journal, 3 May 2011

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3D-IC Standardization Underway at SEMI
SEMI Standards Watch, April 2011

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Si2 to form 3-D IC standards group
EE Times, 26 April 2011

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Major Semiconductor Companies Join SEMATECH's 3D Enablement Center
Investors.com, 25 April 2011

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3-D ICs stack up design challenges
EE Times, 20 April 2011

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IEEE Workshop: Panelists Identify Requirements for 3D IC Adoption
Cadence blog, 14 April 2011

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Herb Reiter on the 3D landscape as he sees it today and
What’s driving 3D IC design?
EDA360 Insider, 11 & 12 April 2011

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Industry catches on to 3D chip mania
EETimes India, 8 April 2011

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The 3-D IC and you
EDN, 7 April 2011

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3D IC Ecosystem Panel: Different Views, Challenging Questions
Cadence blog, 3 April 2011

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JEDEC Standards, Hynix Moves on 3DIC
Insights From the Leading Edge (Advanced Packaging blog), 2 April 2011

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Momentum builds for 3-D chips
EETimes, 2 April 2011

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If wide I/O DRAM and other 3D technologies can go HVM, standards are needed
Advanced Packaging, 30 March 2011

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IMAPS Device Packaging Highlights - 3DIC
Insights From the Leading Edge (Advanced Packaging blog), 26 March 2011

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EDA Tools for 3D IC Design
Chip Design Magazine, Spring 2011

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IMAPS: 3D IC toolset readiness, Cu bonding, interposer failings
Advanced Packaging, 22 March 2011

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JEDEC Announces Broad Spectrum of 3D-IC Standards Development
JEDEC press release, 17 March 2011

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The 3D Ball is Rolling…
3D InCites, 17 March 2011

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Experts At The Table: 3D Stacking Part 3
Semiconductor Mfg. and Design Community, 14 March 2011

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About Chancellors and 3D Chips
Processor Whispers (blog), 14 March 2011

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SRC Focus Center 3D Update
Insights From the Leading Edge (Advanced Packaging blog), 12 March 2011

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3D Packaging, Issue No. 18
i-Micronews magazine on 3D-IC, TSV, etc, February 2011

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3D-IC Standards Key to TSV Adoption
Semiconductor Mfg. and Design Community, 22 February 2011

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Heterogeneous 3D ICs Could Revolutionize Industry
Semiconductor Mfg. and Design Community, 21 February 2011

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Experts At The Table: 3D Stacking   Part 1 and Part 2
Semiconductor Mfg. and Design Community, 14 and 25 February 2011

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3D: You've Come A Long Way, Baby! (see page 11)
Chip Scale review, Jan/Feb 2011

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3D Integration Entering 2011
i-Micronews, 31 January 2011

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3D Highlights at the RTI 3D ASIP Part 1 & Part 2
Insights From the Leading Edge (Advanced Packaging blog), 29 Jan & 4 Feb 2011

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Thru-Silicon Vias, Current State of the Technology
Package Matters, 30 January 2011

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3DIC in Munich
Insights From the Leading Edge (Advanced Packaging blog), 14 January 2011

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2011: Closing in on 3D Commercialization
3D InCites, 13 January 2011

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Volume driver spotted for 3-D TSVs
EE Times, 12 January 2011

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Gate structure and 3D stacking winners will determine semiconductor industry direction
Advanced Packaging, 11 January 2011

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Who Wins With 3D Stacking?
Low-Power Engineering Community editorial, 7 January 2011

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New 3D Stacked IC Standards Committee at SEMI; Call for Task Force Volunteers
SEMI website, 5 January 2011

     2010

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3D Test Workshop Gets the Ball Rolling
Chip Scale Review, December 2010

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How new PCB design tools are tackling environmental compliance
2Article post, 27 December 2010

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Why 3D-IC conversion resembles the bipolar-CMOS shift
Advanced Packaging, 22 December 2010

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Testing 3D ICs Deep in the Heart of Texas and
IEEE 3D IC Test Workshop Part 2
3D InCites blog, 17 & 22 December 2010

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How Standards Will Support Industry’s 5-Year Challenges, Part 2
Collaborative Advantage blog, 14 December 2010

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3D: Design. Deploy. Dominate.
EDN blog "Superheroes of SOC," 13 December 2010

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Our Baby’s All Grown Up!
3D InCites blog, 13 December 2010

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3-D IC Implementation issues   and
Progress in 3-D IC production
Media and Entertainment Technologies, 9 December 2010

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SEMATECH, SIA and SRC team to establish new collaborative program for enabling 3D ICs
i-Micronews. 9 December 2010

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Semi consortium on 3DIC standards
i-Micronews, 8 December 2010

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Semiconductor Groups Form 3D IC Standards Efforts to Save Moore’s Law
"Silicon Cowboy" blog, 8 December 2010

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3D ICs with TSVs - Design Challenges and Requirements
Cadence white paper, December 2010

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Diving into the deep end of the 3D ocean
3D InCites blog, 6 December 2010

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Global Semiconductor Alliance Creates 3D Integrated Circuit (IC) Initiative
GSA press release, 3 December 2010

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Semicon Taiwan 3D Forum: Major players reveal current status of 3D IC commercialization
R&D, 3 December 2010

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Programmable ICs: the next Innovation Engine
EE Times, 2 December 2010

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System and IC Design - Manhattan Style  and
3D Standards: A Catalyst to Deliver 'More Than Moore'
Future Fab, November 2010

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3D Packaging Volume 17
i-Micronews magazine on 3D-IC, TSV, etc; November 2010

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First 3D-TEST Workshop
3D InCites blog, 22 November 2010

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Building Up In 3D: the next steps from SOC to 3D-ICs
i-Micronews, 22 November 2010

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3D-ICs: Featured Articles and news items
SOCcentral, an ongoing resource with frequent updates

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IMAPS 3D Panel Presents United Front
3D InCites blog, 16 November 2010

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3D ICs in the spotlight at IMAPS
Advanced Packaging, 11 November 2010

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Global Semiconductor Alliance Creates 3D Integrated Circuit (IC) Initiative
Business Wire, 3 November 2010

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3D roadmaps begin to converge
Advanced Packaging, 4 October 2010

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2009 ITRS Interconnect Roadmap - a Chance to Say “I Told You So”
Insights From the Leading Edge (Advanced Packaging blog), 20 September 2010

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3D-IC TSV Update: No Technology Roadblocks, But Cost Management is Needed
Cadence blog, 13 September 2010

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Moore's law is moving forward... So why Betting on 3D?
i-Micronews, 30 August 2010

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3D at the DAC , 3D Survey at the GSA
Insights From the Leading Edge (Advanced Packaging blog), 23 July 2010

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Global 3D Chips/3D IC Market to Reach US$5.2 Billion by 2015
PRWeb, 18 August 2010

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The Future of Computing, from Extreme to Green
The Kavli Foundation, August 2010

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Future Fab International, Issue 34 (focus on 3D)
Future Fab, July 2010

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3D-IC Co-Design Challenges
Cadence presentation at SEMICON, July 2010

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SEMICON West Lesson #3: 3D and packaging are hot
Advanced Packaging, 26 July 2010

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FPGA makers reported to actively develop 3DIC architectures
i-Micronews, 20 July 2010

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The time is now for 3-D stacked die
EDN, 15 July 2010

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Forum tries to spark standards for 3-D chips
EE Times, 13 July 2010

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DAC 2010 – A “Coming Out” Party For 3D-IC Design
3D InCites blog, 29 June 2010

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Advanced Packaging at 2010 Las Vegas ECTC
Insights From the Leading Edge (Advanced Packaging blog), 20 June 2010

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Tour Guide to 3D-IC Design Tools & Services
GSA presentation at DAC, 15 June 2010

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EDA Vendors: Ramped and Ready for 3D
3D InCites blog, 16 June 2010

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Using FPGAs For 3D Stacking
Low-Power Engineering blog, 10 June 2010

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With the Uncertainty of Moore’s Law, Industry Expands 3D IC Development
SEMI press release, 3 June 2010

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Wafer-Level 3D ICs: Technology Platforms and Applications
RPI Powerpoint presentation, May 2010

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3D-IC Standards - First, Let's Define Our Terms
Cadence blog, 10 May 2010

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EDA Workshop: A Reality Check and
EDP Symposium Uncovers an Inconvenient Truth
Cadence blog, 19 and 16 April 2010

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3-D IC Standardization Begins
Perspectives from the Leading Edge, 15 April 2010

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Micronews No. 92 (pdf format, includes 5 articles on 3D-ICs)
i-Micronews, April 14 2010

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SET Newsletter #6 (includes 3 articles on 3D ICs
Smart Equipment Technology,  April 2010

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State-of-the-Art and Trends in 3D (pdf format)
Chip Scale Review, March-April 2010

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3D ICs with TSVs - Design Challenges and Requirements
Cadence white paper, March 2010

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3D TSV Technologies & Scenarios, Via first or Via last? (available for purchase)
Yole Development (via ReportLinker), 4 March 2010

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Trends and Technologies in 3D Packaging and Integration
IMAPS Keynote, 16 Feb 2010

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3-D IC System Level Cost Analysis
Perspectives from the Leading Edge, 23 February 2010

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SET Technical Bulletin #3 (pdf format, includes several papers on 3D ICs)
Smart Equipment Technology, January 2010

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3D Through Silicon Via: Infrastructure and Markets (available for purchase)
TechSearch International, 29 January 2010

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Focus on 3D Design
3D InCites, 25 January 2010

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VIA to Emerging Memory Technologies
EDN blog, 21 January 2010

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The Future Looks Bright For 3D Integration
Electronic Design, 7 January 2010

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3D IC & TSV Interconnects - Business Update 2010 Report (available for purchase)
Yole Development, January 2010

For earlier listings click here

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Contact:  info@3D-IC.org